כניסההרשמה
חזרה

Verification Engineer

Quantum Machines
שכר לא צויןIsrael, Tel Aviv Office, Tel Aviv-Yafo, Israel, מהמשרדמידמשרה מלאה
משרה חיצונית, ההגשה באתר החברהאושר שהמשרה פתוחה לפני 10 שעות

You will verify Quantum Machines’ control systems for quantum computers, working across hardware, software, and quantum physics. You will build verification environments and infrastructure, define test plans and sequences, and integrate verification IPs.

מה תעשו

  • Practice the full range of verification activities.
  • Create verification environments from scratch, including drivers, monitors, and coverage.
  • Integrate VIPs for DDR, PCIe, and AXI.
  • Define verification sequences using complex control-flow constraints.
  • Integrate reference models and define test plans.
  • Define verification flows and build supporting infrastructure.

דרישות

  • 3–5 years of experience with UVM and SystemVerilog.
  • Ability to build verification environments from scratch.
  • Knowledge of verification IPs and protocols, including PCIe, DDR, and AXI.

יתרון

  • Good understanding of hardware/software interaction.
  • Knowledge of C, C++, Python, or SystemC.

תנאי סף

  • 3–5 years of experience with UVM and SystemVerilog
  • Knowledge of verification IPs and PCIe, DDR, and AXI protocols
UVMSystemVerilogPCIeDDRAXIVerification IPC++Python