כניסההרשמה
חזרה

Logic Digital Verification Engineer

Wiliot
שכר לא צויןIsrael - Caesarea, Caesarea, Israel, היברידימידמשרה מלאה
משרה חיצונית, ההגשה באתר החברהאושר שהמשרה פתוחה לפני 12 שעות

Wiliot is looking for an engineer to lead verification of its core product, including building and maintaining verification environments and defining and executing test plans. The role covers block-level and full-chip designs and involves working with digital, analog, software, back-end, and system teams.

מה תעשו

  • Define and implement SV/UVM verification solutions, including test benches and methodologies.
  • Integrate mixed-signal SoC simulation using Verilog, MATLAB, HW/SW co-simulation, and lab integration.
  • Work with Digital Design, Analog Design, Software, Back-end, and System teams to understand product goals and ensure quality.

דרישות

  • B.Sc. in Electrical Engineering, Computer Engineering, or another relevant engineering department with high scores, or equivalent experience.
  • 2+ years in design verification with strong SV/UVM proficiency; less experienced engineers with high university grades or extensive RTL design knowledge will also be considered.
  • Understand digital ASIC design flows and SoC development methodologies.
  • Experience with SoC/full-chip verification, simulation/debug tools, Unix/Linux environments, scripting languages such as Python, and version control.
  • Ability to work, lead, and drive tasks to completion; strong interpersonal skills.

יתרון

  • Knowledge of low-power techniques and the UPF standard.
  • Knowledge of mixed-signal SoCs.
  • Experience with SW/HW co-development.
SystemVerilogUVMVerilogMATLABPythonASIC VerificationSoC VerificationUnix/Linux